# Evidence: integrated calibration and code-review software gate

Status: complete
Type: evidence
Updated: 2026-07-24
Parent: work/maps/map-smi-firmware-stabilization-and-qualification.md

## Scope

This evidence freezes the software-only gate for the bounded main-temperature
calibration policy and the remaining SMI code-review mitigations. It authorizes
the next read-only baseline and flash/review sequence; it is not target,
power-interruption, or release qualification.

No controller was programmed and no SD or USB media was modified during this
gate. CID evidence is therefore not applicable to this software-only build
record. The fresh target results must include the required service-467 CID
identity blocks.

## Frozen identity

- Branch: `codex/firmware-00-05-00-hpt-filesystem`
- Source commit: `809362d8`
- Artifact commit: `c7a20522`
- Firmware version: `00.05.00`
- Debug ELF SHA-256:
  `16A62979AA91270D4D6CB274042F2E125416D313BEC1C6B83BE49E56F9FAC2B3`
- Debug SREC SHA-256:
  `BA2CF3DB7A52C1487A28C1F274D7DBF0D60F17F3A2E014DE015ADE4508FAF15C`
- Release ELF SHA-256:
  `1F182D5DF5C25A67E363E760A2F578E5D8F6DAA34D6A37414D1F69F62CB0D97B`
- Release SREC SHA-256:
  `6C37BDC4813485329D02D4762C601D0F2AB80DB6E69FF83F1D45C40E54345617`
- Stable and `_00_05_00` filenames matched byte-for-byte for all four
  configuration/format pairs.

## Build results

- Clean Debug rebuild: PASS
- Clean Release rebuild: PASS
- Versioned Debug packaging: PASS
- Versioned Release packaging: PASS
- Debug and Release size:
  `text=2866508`, `data=0`, `bss=28463052`
- Release RAM used-end symbol: `0x2005F168`
- RAM headroom to `0x20080000`: `134808` bytes
- Remaining compiler output consists of existing project/vendor warnings; no
  build error occurred.

## Automated verification

- Temperature calibration source policy: 13/13 PASS
- Focused code-review mitigation source policy: 15/15 PASS
- Synthetic firmware-update validation corpus: 16/16 PASS
- Configuration semantics/fingerprint models: PASS
- Graph and export-range checks: PASS
- SD safety and HPT routing checks: PASS
- HPT commissioning checks: 86/86 PASS
- HPT customer export checks: 20/20 PASS
- HPT scrub checks: 8/8 PASS
- CID source checks: 25/25 PASS
- HPT-only routing checks: 8/8 PASS
- Legacy service retirement checks: PASS
- HPT export, scrub, triple-circular, and exhaustive write-cut models: PASS
  (`141` write-cut states)

## Open gates

1. Capture the still-running pre-change configuration/calibration and live
   temperature baseline for Controllers A and B before flashing.
2. Capture same-run service-467 CID evidence at baseline and after each relevant
   reboot, initialization, reinsertion, or card change.
3. Load artifact commit `c7a20522` on both controllers and execute one fresh
   interactive checklist for calibration, update, UI, logging, export, alarms,
   configuration recovery, and debugger readback.
4. Keep physical power cuts and interruption endurance blocked until G-PWR
   passes the permanently connected topology witness matrix.
